1. Field of the Invention
The present invention relates to a delta-sigma modulator circuit and a delta-sigma AD converter apparatus using a delta-sigma modulator circuit, and in particular, to delta-sigma modulator circuit and a delta-sigma AD converter apparatus using a delta-sigma modulator circuit provided with a reset circuit for resetting an integrator of the delta-sigma modulator circuit.
2. Description of the Related Art
For a delta-sigma modulator circuit and a delta-sigma AD converter apparatus using the delta-sigma modulator circuit according to the prior art, it is necessary to increase the order of a filter so as to obtain a high signal-to-noise ratio (referred to an SNR hereinafter). However, if the order of the filter is higher, the operation becomes more unstable, with the result that oscillation tends to occur more easily. Even if the operation is stable in a design phase based on simulation, oscillation often occurs when unexpectedly high-level signals are inputted in a practical phase. Moreover, once an oscillation occurs, the oscillation often continues even if a signal input level returns into an input level design range. In this case, it is necessary to appropriately reset the circuit or apparatus.
The Japanese patent laid-open publication No. JP-2002-118431-A discloses a method of detecting an oscillation and a method of suppressing the oscillation in a delta-sigma modulator circuit. The delta-sigma modulator circuit includes a switching amplifier. In the switching amplifier, a semiconductor power amplifier device provided in a constant voltage switch operates in a saturation range in response to a one-bit signal obtained by a delta-sigma modulation, and executes switching of a high voltage supplied from a power source, and the same signal is passed through a low-pass filter (referred to as an LPF hereinafter) to be smoothed. This leads to amplification of an audio signal with a higher efficiency. In order to detect oscillation of the delta-sigma modulator circuit and to prevent breakdown of the semiconductor power amplifier device, the switching amplifier is configured as follows. A pulse count circuit measures a time interval for which high-level or low-level one-bit signals are continuously input by counting pulses of clock signals supplied from a clock generator circuit that defines a timing of the one-bit signal. When the number of one-bit signals is equal to or greater than a predetermined threshold value, a power-off circuit is actuated to shut down a power line to the constant voltage switch.
With the method of detecting an oscillation in the delta-sigma modulator circuit according to the prior art configured as stated above, high-level signals are continuously generated during an oscillation. Due to this, the number of signals is measured and it is considered that the delta-sigma modulator circuit is in an “oscillation state” when the number of signals exceeds the predetermined threshold value. Therefore, it is disadvantageously necessary to prepare a counter counting signals, and it disadvantageously takes relatively long time to measure the number of signals and to detect occurrence of an oscillation. On the other hand, the method according to the prior art has the following problems. It is possibly erroneously determined that the delta-sigma modulator circuit is in the “oscillation state” even when low-frequency signals are inputted if the threshold value is inappropriately set.